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THV3058_rev.1.00_e 1/21 thine electronics, inc. copyright?2010 thine electronics, inc. THV3058 features ? qfn 36 pin package ? input voltage range : 9 ~ 15v ? push pull output for direct power mos driving ? optimized for ceramic output capacitor ? complete pwm mode controller ? positive/negative charge pumps (pfm mode controller) ? switching frequency : 500khz ? under voltage protection (timer latch ) ? dc/dc over voltage protection (ch-2, ch-3 : timer latch ) ? dc/dc over current protection ? uvlo function ? ch-1 boost converter ? ch-2 buck converter (reference voltage:0.85v) ? ch-3 buck converter (output voltage : 3.3v) ? high voltage ldo 3ch (buck/boost) 2ch cp 1ch hvldo controller description THV3058 is a controller ic for multi-channel power supply system with 3 channel pwm dc/dc convert- ers(ch-1 boost/ch-2, ch-3 buck) and 2 channel charge pump circuits. THV3058 contains internal soft start, under voltage protection, over voltage protection and over current protection, which helps reducing the number of exter- nal component count and increasing reliability. built-in positive and nega tive charge pump cir- cuits(vgl/vgh) achieve enhanced performance. ceramic capacitors are ava ilable for output, that pro- vides space-saving and low cost system. THV3058 is ideal for tft-lcd bias power supply system. application ? tft-lcd bias power supply pin assignment qfn 36pin exposed pad (top view) 37gndexp 13 10 11 12 18 17 15 16 14 ll3 7 5 6 8 3 2 1 4 9 22 21 20 19 23 26 25 24 27 out1 cs1 vreg5 vgh_ok fb2 pc3 sgnd vo3_in out3 bst3 pgnd cs3 vref test1 test2 inv_vgh ll2 out_h2 bst2 out_vgh v_vgh v_vgl out_vgl pgnd_cp non_vgl 33 36 35 34 28 29 31 30 32 vcc lsw_out inv1 out_hldo inv_hldo sysuvlo inv2 cs2 out_l2 fb1
THV3058_rev.1.00_e 2/21 thine electronics, inc. copyright?2010 thine electronics, inc. output channel description output channel description ch-1 pwm boost converter ch-2 pwm buck converter (nmos transistor drive for synchronous rect ifier / available for diode rectification) ch-3 pwm buck converter fixed 3.3v vgh positive charge pump vgl negative charge pump hvldo high voltage ldo lsw_out output for the external load switch. vgh_ok output for vgh power good signal.
THV3058_rev.1.00_e 3/21 thine electronics, inc. copyright?2010 thine electronics, inc. block diagram ss_ok_lsw ss_ok1 ss_ok2 vref + - out_hldo inv_hldo cur_ limit v_ vgh thv 3058 tft multi channel controller vcc vin=12v sgnd vo1 vreg5 ovp1 + - out1 inv1 vo1 pgnd cs1 - + ss fb1 max duty + - vref vreg5 op - + comp lsw_out vls out_vgh + - osc osc out_vgl + - osc vgl vgl + - pg_ vgh + - pg_ vgl vref osc uvlo 5v reg out3 vo3 =3.3v bst3 ll3 ovp3 + - vo3_in vo3 - + vref gm - + comp osc stop cs3 v_ vgh vreg5 vgh + - pg_vgl uvp3 + - stop max duty ss_ok_lsw ss_ok1 stop ss_ok2 + - test1 vgh v_ vgl vgh_ok pg_vgh vref vo1 vls vcc vref vref error detection stop uvp1, 2, 3 sysuvlo pc3 tsd 5msec delay timer latch uvlo inv_ vgh non_ vgl v_ vgl ss pgnd_cp ovp2, 3 out_h2 vo2 bst2 ll2 ovp2 + - - + ss 0.85v op - + comp osc cs2 vreg5 uvp2 + - stop max duty fb2 uvlo inv2 + - out_l2 stop p_good uvp1 test2 vo2 pg_vgl, vgh
THV3058_rev.1.00_e 4/21 thine electronics, inc. copyright?2010 thine electronics, inc. pin# symbol function description 1 out1 ch-1 output boost driver pin for ch-1 external device. output range is 0~5v. 2 29 14 cs1 cs2 cs3 ch-1, ch-2, ch-3 over current sense connect cs1 to sence re gistance connected lo w side nmos source. connect cs2 to sence registance c onnected low side nmos source or diode anode. connect cs3 to sence regist ance connected diode anode. 3 vreg5 5v regulator output 5v regulator output pin. powe r supply for low voltage output. connect an external capacitor(typ:4.7 f) between this pin. 4 vgh_ok vgh power good signal open drain output. connect an appr oximately 100k ohm pull-up resistor. when vgh has generated normally, the output is fixed to high level. 5 31 inv1 inv2 ch-1,ch-2 error amplifier inverting input ch-1, ch-2 error amp inverting input s. the voltage on inv1 is 1.2v, and inv2 is 0.85v, in the normal operation. 6 32 fb1 fb2 ch-1,ch-2 error amplifier output ch-1, ch-2 error amplifier outputs for phase compensation by connect- ing resistors and ca pacitors between fb1,2 and inv1,2. 7 pc3 ch-3 phase compensation c onnect a capacitor between this pin for phase compensation. 8 sgnd signal ground ground for control circuit. 9 vo_3in ch-3 output voltage feedback ch-3 output voltage feedback pin. 26 11 ll2 ll3 ch-2, ch-3 node connection to inductor ch-2, ch-3 node conne ction to inductor. 10 out3 ch-3 output driver pin for ch-3 high side transistor. 25 12 bst2 bst3 ch-2, ch-3 high side capac- itor connection ch-2, ch-3 power supply for high side driver output. bootstrap diodes are built-in. 13 20 pgnd pgnd_cp power ground ground for power supply 15 vref reference voltage reference voltage(1.2v). connect an external capacitor(0.01 f) between this pin for stability. maximum load current is 1ma. 16 17 test1 test2 test pin connect to ground or open in normal use.. 18 inv_vgh vgh comparator inverting input vgh comparator inverting input 19 non_vgl vgl comparator non-invert- ing input vgl comparator non-inverting input 21 out_vgl vgl (charge pump -)output vgl drive output for negative voltage charge pump. v_vgl is used as input power supply. in pfm mode, this pin can be used as pmos gate drive. 22 v_vgl vgl output voltage suppl y vgl output voltage supply. 23 v_vgh vgh output voltage supply vgh output voltage supply. 24 out_vgh vgh (charge pump +)output vgh drive output for positive voltage charge pump. v_vgh is used as power supply. in pfm mode, this pin can be used as nmos gate drive. pin description
THV3058_rev.1.00_e 5/21 thine electronics, inc. copyright?2010 thine electronics, inc. pin# symbol function description 27 out_h2 ch-2 high side drive output ch-2 high side nmos transistor drive for synchronous rectifier. 28 out_l2 ch-2 low side driver output ch-2 low side nmos transistor drive for synchronous rectifier. available even without low side nmos transistor. 30 sysuvlo system uvlo input sysuvlo pin shuts down the ic, when the power supply voltage (vin) is lower than the predetermined voltage. the threshold voltage is 3.5v, the release voltage is 5.46v. by internal setting. th e threshold voltage also can be set optionally by changing th e external resistance value. 33 inv_hldo hvldo amplifier inverting input hvldo inverting input. th e voltage on this pin is 1.2v in the normal oper- ation. 34 out_hld o hvldo output hvldo output. connect to an external capacitor(typ:2.2 f). 35 lsw_out output for ch-1 switch con- trol gate control pin for ch -1 external switch. soft start function is built-in. 36 vcc power supply power supply for control.
THV3058_rev.1.00_e 6/21 thine electronics, inc. copyright?2010 thine electronics, inc. absolute maximum ratings parameter symbol rating unit power supply voltage vcc vcc 18 v cs1, cs2, cs3, inv1, i nv2, fb1, fb2, vo3_in, test1, test2, inv_vgh, non_vgl, sysuvlo, inv_hldo, vl_in 6.5 v out1, vreg5, vgh_ok, pc3, vref, out_l2, bst2-ll2, out_h2-ll2, bst3-ll3, out3-ll3 vl_out 6.5 v out_vgl, out_vgh, out_h ldo, lsw_out vh_out1 20 v ll2, ll3 vh_out2 18 v out_h2, bst2, out3, bst3 vh_out3 24.5 v v_vgl, v_vgh vh_cc 20 v power dissipation pd 2556 (ta<25 c) mw junction temperature tj 150 c operating ambient temperature range ta -40 ~ +85 c storage temperature range tstg -55 ~ +150 c power dissipation 0 500 1000 1500 2000 2500 3000 -40 -20 0 20 40 60 80 100 120 140 160 ambient temperature ta () power dissipation pd (mw)
THV3058_rev.1.00_e 7/21 thine electronics, inc. copyright?2010 thine electronics, inc. recommended operating conditions parameter min typ max unit vcc voltage (input power supply voltage) 9 - 15 v v_vgh, v_vgl voltage 9 - 17 v out_hldo, lsw_out voltage -0.1 - 17 v vgh_ok, sysuvlo voltage -0.1 - 5.5 v external capacitance for vref pin - 0.01 - f external capacitance for vreg5 pin 2.2 4.7 - f external capacitance for out_hldo pin 1 2.2 - f
THV3058_rev.1.00_e 8/21 thine electronics, inc. copyright?2010 thine electronics, inc. parameter symbol conditions min typ max unit reference voltage block reference voltage vref cvref = 0.01 f 1.188 1.200 1.212 v reference voltage (ch-2) vref(ch- 2) vref x 0.85/1.2 0.84 0.85 0.86 v line regulation vref (line) iref = -100 a, vcc = 9 ~ 15v - 2 5 mv load regulation vre f (load) iref = -100 a ~ -1ma - 2 5 mv 5v regulator block output voltage vreg5 (range) io = -1ma - 5.0 - v load regulation vreg5(load) io = -0.1ma ~ -5ma -- 100 mv line regulation vreg5(line) i o = -1ma, vcc = 9 ~ 15v -- 20 mv oscilator circuit block oscillation frequency fosc 430 500 570 khz dtc circuit block maximum duty cycle(ch-1) dmax (ch-1) - 86 - % maximum duty cycle(ch-2, 3) dmax (ch-2, 3) - 84 - % duty cycle(vgh) d(vgh) - 50 - % duty cycle(vgl) d(vgl) - 18 - % error amplifier block offset voltage vio1 based on vref pin voltage -10 - 10 mv vio2 buffer connection based on the value : vref x 0.85/1.2 gm (ch-3) gm(ch-3) pc3 = 2.5v -340 -520 -760 s charge pump block threshold voltage(vgh) vthc(vgh) inv_vgh pin - 1.2 - v threshold voltage(vgl ) vthc(vgl) non_vgl pin - 0 - v offset voltage(vgh, vgl) vioc (vgh,vgl) -20 - 20 mv vgh power good inv_vgh threshold voltage vpgvgh inv_vgh pin - 1.02 - v output resistance ropgvgh vgh_ok = low, io = 1ma - 0.9 1.6 k off leak current ioffpgvgh vgh_ok = 5v -- 1 a electrical characteristics (unless otherwise specified, vcc=12v, ta=25 c )
THV3058_rev.1.00_e 9/21 thine electronics, inc. copyright?2010 thine electronics, inc. parameter symbol conditions min typ max unit high voltage ldo block reference voltage vre f(hvldo) inv_hldo pin - 1.2 - v offset voltage vhvldo(off) ildo = -1ma -20 - 20 mv load regulation vhvldo (load) vo_1in = 16v, out_hldo = 15v ildo = -0.1m ~ -20ma - 16.5 45 mv high side output voltage range vhldo (hrange) ildo = -10ma v_vgh -0.5 v_vgh -0.2 - v low side output voltage range vhldo (lrange) ildo = -10ma 5.5 -- v dropout voltage vdrop (hldo) ildo = -10ma,vo_1in = 16v, inv_hldo = 0v - 60 120 mv switch control block lsw_out output resistance ro (1sw_out) io = 1ma - 1.2 - k output block out1 h level output resistance roh(ch-1) ioh = -50ma - 17 - out1 l level output resistance rol(ch-1) iol = 50ma - 11 - out_h2 h level output resistance roh(ch-2h) ioh = -50ma - 17 - out_h2 l level output resistance rol(ch-2h) iol = 50ma - 13 - out_l2 h level output resistance roh(ch-2l) ioh = -50ma - 22 - out_l2 l level output resistance rol(ch-2l) iol = 50ma - 6 - out3 h level output resistance roh(ch-3) ioh = -50ma - 17 - out3 l level output resistance rol(ch-3) iol = 50ma - 13 - out_vgh h level output resistance roh(vgh) v_vgh = 15v, ioh = -50ma - 3.5 - out_vgh l level output resistance rol(vgh) v_vgh = 15v, iol = 50ma - 3.5 - out_vgl h level output resistance roh(vgl) v_vgl = 15v, ioh = -50ma - 11 - out_vgl l level output resistance rol(vgl) v_vgl = 15v, iol = 50ma - 5 - output voltage vo3 output voltage vo3 vo3_in pin 3.23 3.30 3.37 v under voltage protection block threshold voltage (ch-1) vuvp(ch-1) inv1 pin - 1.02 - v threshold voltage (ch-2) vuvp(ch-2) inv2 pin - 0.64 - v threshold voltage (ch-3) vuvp(ch-3) vo3_in pin - 2.64 - v threshold voltage (vgh) vuvp(vgh) inv_vgh pin - 1.02 - v threshold voltage (vgl) vuvp(vgl) non_vgl pin - 0.18 - v
THV3058_rev.1.00_e 10/21 thine electronics, inc. copyright?2010 thine electronics, inc. parameter symbol conditions min typ max unit timer latch block timer (uvp) timer(uvp) - 12.2 - ms timer (ovp) timer(ovp) - 2.44 - ms soft start block soft start time(ch-1,3) ss1,3 - 10 - ms soft start time(ch-2) ss2 - 7 - ms soft start time(lsw) ss_lsw - 10 - ms vgh delay time vgh_delay - 5 - ms over voltage protection block threshold voltage (ch-1) vovp(ch-1) inv1 pin - 1.5 - v threshold voltage (ch-2) vovp(ch-2) inv2 pin - 1.06 - v threshold voltage (ch-3) vovp(ch-3) vo3_in pin - 4.13 - v over current protection threshold voltage(ch- 1) cs1(vth) cs1 pin - 100 - mv threshold voltage(ch- 2) cs2(vth) cs2 pin - -100 - mv threshold voltage(ch- 3) cs3(vth) cs3 pin - -175 - mv system uvlo block release voltage vuvlo vcc pin 5.0 5.46 6.0 v hysteresis voltage vuvlo(hys) vcc pin 1.4 1.96 2.5 v system uvlo external setting release voltage vsysuvlo sysuvlo pin 1.44 1.56 1.68 v hysteresis voltage vsysuvlo (hys) sysuvlo pin 0.41 0.56 0.71 v overall average current consumption icc(op) output swing on(vcc pin) - 3.1 - ma icc output swing off - 2.1 - ma
THV3058_rev.1.00_e 11/21 thine electronics, inc. copyright?2010 thine electronics, inc. functional description system uvlo uvlo stops the device operation if the input power supply voltage dr ops below a preset voltage. the threshold voltage is 3.5v, the release voltage is 5.46v by internal setting. when input power supply voltage(vin) rises above 5.46v, the device goes into soft start mode and output voltage(vo) increases gr adually up to the regular voltage. if the input power supply voltage(vin) drops below 3.5v, uvlo stops switching operation immediately and accompanies output voltage drop (see figure 1). uvlo comp vcc sysuvlo vin r1 r2 500k 200k the uvlo threshold voltage also can be set optionally by changing th e external resistance value (see figure 2). the uvlo threshold voltage are given by the following formulas. pl ease use lower the external resistance value than the inter- nal resistance value. release voltage of system uvlo detection voltage of system uvlo 1.56 r1 r2 + r2 ------------------ - 1.0 r1 r2 + r2 ------------------ - figure 2. system uvlo setting circuit figure 1.uvlo operation vin vo switching operating stop operating stop 5.46 v 3.50 v
THV3058_rev.1.00_e 12/21 thine electronics, inc. copyright?2010 thine electronics, inc. dc/dc converter ch -1, ch-2, ch-3 ch-1, ch-2 and ch-3 are pwm controllers. ch-1 is for boost, ch2 is synchronous rectifier buck and ch-3 is fixed 3.3v for buck. implementing over current protection circuit. the maximum duty cycle of ch-1 is internally limited to 86%, ch-2, ch-3 to 84%. vgh_ok vgh_ok pin is open drain output of nmos pull-down transistor. when the power supply is turned on, vgh_ok pin is gnd level. when the voltage on vgh r eaches 85% of normal output voltage, nmos tr ansistor is turned off. charge pump circuit vgh, vgl vgh is positive charge pump circuit, and vgl is negative on e. these also operate in pfm mode. the pulse duty of vgh is fixed 50%, vgl is fixed 18%. high voltage ldo figure 3 shows the circuit of high voltage ldo. connect to an external output capacitor (typ:2.2 f). high voltage ldo has built-in auto-recovery current limit function. the th reshold current is 250ma. the output voltage is given by the following formula. figure 3. high voltage ldo circuit vhldo vref 1 r1 r2 ----- - + ?? ?? 1.2 1 r1 r2 ----- - + ?? ?? == vref + - out_ hldo inv_ hldo cur_ limit v_ vgh r1 r2 vhldo 2.2uf
THV3058_rev.1.00_e 13/21 thine electronics, inc. copyright?2010 thine electronics, inc. soft start to prevent excessive rise of output voltage during start-up. THV3058 have soft start circuits within ch-1, ch-2, ch-3 and load switch circuit. the output voltages of these internal soft start circuits rise accord ing to each internal start-up sequences, and then make the output of dc /dc converter and the output after load switch rise up. soft start operation is completed when these outputs have reached each regular voltages. soft start time of ch-2 is 7msec and ch-1, ch-3 and load switch are set to 10msec (see figure 4). start-up sequence figure 4 shows the waveform of start-up sequence. ch-1 and ch-3 are operate af ter ch-2 is generated completely. vgl starts after the start-up of ch-1 is completed. vgh starts with 5msec delay, after vls signal is generated. vgh vo2 5msec 10msec 7msec vo1 vls 10msec vgl hvldo vgh_ok vo3=3.3v voltage reference circuit voltage reference circuit generates temperature-compensate d voltage(= 1.2v) for use as the internal reference volt- eage. also, an external load current can be obtained from the power supply at vref pin, up to 1ma, maximum. please connect a capacitor of 0.01 f between vref pin and sgnd for stability. thermal shut down(tsd) THV3058 has the built-in thermal shut down circuit to prevent damage s caused by excessive heat. when the junction temperature reaches 175 c , tsd circuit stops switching operation and the regulator vreg5 operation. the release tem- perature is 160 c. figure 4. start-up sequence waveforms
THV3058_rev.1.00_e 14/21 thine electronics, inc. copyright?2010 thine electronics, inc. under voltage protection(uvp) uvp circuit shuts down the power supply, when the under vol tage condition continues for lo nger time than a predeter- mined time. the internal comparator monitors the output volta ge feedback pin. when the output voltage drops under a pre- determined voltage, the timer latch circuit is activated (see figure 5). when under voltage condition continues for more than 12.2msec, the device stops switching operation and goes into latch state. the timer will be reset, if uvlo operates before the device goes into the latch state. in case of vgh and vgl, uvp is operated in 3msec after the st artup. please set the startup time of charge pumps within 15msec to prevent abnormal operation. over voltage protection(ovp) ovp shuts down the power supp ly, when the output voltage of ch-1, ch-2 and ch-3 exceeds a predetermined volt- age. when the voltage of inv1 pi n exceeds 1.5v on ch-1, inv2 pin ex ceeds 1.06v on ch-2 and ,vo3_in pin exceeds 4.13v on ch-3, controller turns off an external mo s transistor and stops switc hing operation, respectively (see figure 6). as to ch-2 and ch-3, when abnormal output is detected, timer latch circuit is activated. when abnormal output contin- ues 2.44msec, the device stops switching operation and goes into the latch state. + - amp or comp vref + - vth uvp comp output voltage detection scp timer latch + - amp vref + - vth ovp comp ss output voltage dtection pwm comp out figure 5. under voltage detection circuit figure 6. over voltage detection circuit
THV3058_rev.1.00_e 15/21 thine electronics, inc. copyright?2010 thine electronics, inc. over current protection(ocp) ch-1, ch-2 and ch-3 have built-in over current protection circuit. over current detectio n circuit monitors the load cur- rent. when load current exceed s a predetermined current, the external mos transistor is tu rned off and the device stops switching operation for 128usec(see figure 7, 8, 9). the maximam current are given by the following formulas. if the over current is detected continuously, the switching pulse is generated at 128usec interval and that causes output voltage drop. when the output voltage drops below the pred etermined voltage for more than 12.2msec, scp stops switch- ing operation and the device goes into latch state. [a] rcs3 0.175 rcs3 vcs3 i [a] rcs2 0.1 rcs2 vcs2 i [a] rcs1 0.1 vo1 vin rcs1 vcs1 vo1 vin i max3 max2 max1 = = = = = = pwm comp out1 vo1 + - cs1 pgnd vin detection current output current io1 vcs1=0.1v rcs1 out3 vo3=3.3v bst3 ll3 cs3 pgnd vreg5 + - pwm comp vin output current io3 detection current vcs3=0.175v rcs3 out_h2 vo2 bst2 ll2 cs2 pgnd vreg5 + - pwm comp vin output current io2 detection current vcs3=0.10v rcs2 out_l2 figure.7 ch-1 over current detection circuit figure.8 ch-2 over current detection circuit figure.9 ch-3 over curr ent detection circuit
THV3058_rev.1.00_e 16/21 thine electronics, inc. copyright?2010 thine electronics, inc. figure 10. output voltage setting output voltage setting figure 10 shows ch-1 and ch-2 output voltage setting model. the voltage on inv1 pin is equal to the voltage on vref pin due to the effect of feed-back. the voltage on inv_1 pin is the divided voltage of vout by r1 and r2. so, therefore, since vref =1.2v, then similarly the output voltage of ch-2 is described as follows. vout1 r2 r1 r2 + ------------------ - vref = vout1 vref 1 r1 r2 ----- - + ?? ?? = vout1 1.2 1 r1 r2 ----- - + ?? ?? = vout2 0.85 1 r4 r5 ----- - + ?? ?? = c1 fb1 inv1 vout1 r2 r3 r1 + - error amp1 vref =1.2v pwm comp. fb2 inv2 vout2 r5 r6 r4 + - error amp2 pwm comp. c3 c2 c4 vref =0.85v
THV3058_rev.1.00_e 17/21 thine electronics, inc. copyright?2010 thine electronics, inc. description of charge pumps. as to vgh, the voltage on inv_ vgh pin is controlled to be equal to the voltage of vref (see figure 11). the voltage on inv_vgh pin is the divided voltage of vgh by r9 and r10. so vgh vref 1 r7 r8 ----- - + ?? ?? 1.2 1 r7 r8 ----- - + ?? ?? == as to vgl, the voltage on non_vgl pin is controlled to be zero (see figure 12, figure 13). the current through non_vgl is negligible. therefore vgl vref () ? r9 r10 -------- - 1.2 ? r9 r10 -------- - == inv_vgh vgh r8 r7 + - comp vref =1.2v output circuit non_vgl vgl r10 r9 + - comp output circuit vref =1.2v r9 vref 1.2v r10 vgl 0v figure 11. output setting for vgh figure 13. output setting for inverting mode figure 12. output setting for vgl
THV3058_rev.1.00_e 18/21 thine electronics, inc. copyright?2010 thine electronics, inc. temperature characteristics vref vs ambient temperature 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 -40 -20 0 20 40 60 80 ambient temperature[] vref [v] min. 1.182v max. 1.218v 400 420 440 460 480 500 520 540 560 580 600 -40 -20 0 20 40 60 80 ambient temperature[] fosc [khz] min. 410khz max. 590khz 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 -40 -20 0 20 40 60 80 ambient temperature[] vo3 [v] min. 3.21v max. 3.39v oscillation frequency vs ambient temperature 0.830 0.835 0.840 0.845 0.850 0.855 0.860 0.865 0.870 -40 -20 0 20 40 60 80 ambient temperature[] vref(ch-2) [v] min. 0.835v max. 0.865v vref (ch-2) vs ambient temperature vo3 vs ambient temperature ss1, ss3, ss_lsw vs ambient temperature ss2 vs ambient temperature 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 -40-200 20406080 ambient temperature[] ss1, ss3, ss_lsw [ms] min. 8.1ms max. 11.9ms 5.5 6.0 6.5 7.0 7.5 8.0 8.5 -40 -20 0 20 40 60 80 ambient temperature[] ss2 [ms] min. 5.8ms max. 8.4ms
THV3058_rev.1.00_e 19/21 thine electronics, inc. copyright?2010 thine electronics, inc. uvlo vs ambient temperature cs2(vth) vs ambient temperature cs1(vth) vs ambient temperature cs3(vth) vs ambient temperature 4.5 4.7 4.9 5.1 5.3 5.5 5.7 5.9 6.1 6.3 6.5 -40 -20 0 20 40 60 80 ambient temperature[] vuvlo [v] min. 4.5v max. 6.5v 50 60 70 80 90 100 110 120 130 140 150 -40 -20 0 20 40 60 80 ambient temperature[] cs1(vth) [mv] min. 60mv max. 140mv -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40-200 20406080 ambient temperature[] cs2(vth) [mv] min. -140mv max. -60mv -240 -220 -200 -180 -160 -140 -120 -40-200 20406080 ambient temperature[] cs3(vth) [mv] min. -230mv max. -120mv
THV3058_rev.1.00_e 20/21 thine electronics, inc. copyright?2010 thine electronics, inc. package outline unit : mm qfn36 pin note) the back side of expos ed pad must be connected to gnd, in order to improve thermal properties. 0.90max 5.0 +/-0.1 5.0 +/-0.1 0.2typ 0.7max pitch : 0.4 0.4 +/-0.05 0.18 +/-0.05 3.7 +/-0.1 3.7 +/-0.1 0.45 r : 0.2
THV3058_rev.1.00_e 21/21 thine electronics, inc. copyright?2010 thine electronics, inc. notices and requests 1. the product specifications descri bed in this material are subjec t to change without prior notice. 2. the circuit diagrams described in this material are examples of the application which may not always apply to the customer's design. we are not responsible for possibl e errors and omissions in this material. please note if errors or omissions should be fo und in this mate rial, we may not be able to correct them immediately. 3. this material contains our copy right, know-how or other propr ietary. copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4. note that if infringement of any third part y's industrial ownership s hould occur by using this product, we will be exempted from the responsib ility unless it directly re lates to the production process or functions of the product. 5. this product is presumed to be used for general electric equi pment, not for the applications which require very high reliability (including medical equi pment directly concerning people's life, aerospace equipment, or nuc lear control equipment). also, wh en using this product for the equipment concerned with the control and safety of the transportation m eans, the traffic signal equipment, or various types of safety equipment, please do it after applying appropriate measures to the product. 6. despite our utmost efforts to imp rove the quality and reliability of the product, faults will occur with a certain small probability , which is inevitable to a semi -conductor product. therefore, you are encouraged to have sufficient ly redundant or error preventive design applied to the use of the product so as not to have our produc t cause any social or public damage. 7. please note that this product is not designed to be radiation-proof. 8. customers are asked, if required, to judge by them selves if this product falls under the category of strategic goods under the foreign exch ange and foreign trade control law. 9. the product or peripheral parts may be damaged by a surge in vol tage over the absolute maxi- mum ratings or malfunction, if pins of the product are s horted by such as foreign substance. the damages may cause a smoki ng and ignition. therefore, you are en couraged to implement safety measures by adding protecti on devices, such as fuses. thine electronics, inc. e-mail : sales@thine.co.jp

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